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Different packaging approaches have been followed until now for MEMS devices. The main advantages of thin film capping are twofold: (1) it is a batch process leveraging on the frontend MEMS process, thus contributing to a process cost reduction and (2) it leads to the smallest form factor for a packaged device because, compared to chip capping, the total area of the packaged device can considerably be reduced (e.g., by a factor of 2). Nevertheless, a drawback of thin-film capping is that the final residual pressure and gas inside the package cavity depends on the choice and the deposition conditions of the sealing layer. In spite of the potentiality and critical issues of the wafer-level thin film packages for MEMS devices, few works have been reported until now on the fabrication, reliability, and functional characterization of this packaging procedure [1,2]. In this work, suspended membranes in the thin multilayer SixNyHz/aSi/SixNyHz were fabricated for application as wafer-level packaging of MEMS devices. Details on the fabrication process are given in Ref.[3]. Some membranes were fabricated on coplanar waveguides (CPWs), in order to evaluate their potential for RF MEMS packaging [fig. 1(a)]. The membranes have a width of 200 μm and a length (l) of 300 μm, 400 μm, 500 μm or 600 μm. The curvature radius (R) at the vertices of the membrane base is of 10 μm or 20 μm. The membranes contain a series of holes with a diameter (d) of 3 μm or 5 μm. The density of holes was varied, in order to obtain a percentage (P) of the total area of the holes with respect to the membrane area of P = 10%, 20%, 30% or 40%.
Publication date: 
1 Jan 2016

A Persano, A Lucibello, R Marcelli, G Capoccia, E Proietti, Alvise Bagolini, Jacopo Iannacci, MC Martucci, A Campa, A Taurino, P Siciliano, F Quaranta

Biblio References: 
Pages: 1-2
Proc. of Sensing for Smart Anything Everywhere: Materials, Technologies, Applications (ISOCS-MiNaB-ICT-MNBS))